915 search results - page 55 / 183 » Level Shifter Design for Low Power Applications |
ISVLSI
2008
IEEE
15 years 4 months ago
2008
IEEE
The evolution of deep submicron technologies allows the development of increasingly complex Systems on a Chip (SoC). However, this evolution is rendering less viable some well-est...
SIGMETRICS
2004
ACM
15 years 3 months ago
2004
ACM
Low priority data transfer across the wide area is useful in several contexts, for example for the dissemination of large files such as OS updates, content distribution or prefet...
HPCA
2005
IEEE
15 years 3 months ago
2005
IEEE
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
ISLPED
1995
ACM
15 years 1 months ago
1995
ACM
We argue that the clocked-CMOS (C2MOS) circuit family provides a very high throughput and low power alternative to other existing circuit techniques for the fast developing market...
FPL
2001
Springer
15 years 2 months ago
2001
Springer
Asynchronous logic design has been around for decades. However, only recently has it gained any commercial success. Research has focused on a wide variety of uses, from microproces...