915 search results - page 60 / 183 » Level Shifter Design for Low Power Applications |
FPGA
2005
ACM
15 years 3 months ago
2005
ACM
Vdd-programmable FPGAs have been proposed recently to reduce FPGA power, where Vdd levels can be customized for different circuit elements and unused circuit elements can be powe...
ASPDAC
2009
ACM
15 years 2 months ago
2009
ACM
– The phenomenon of digital convergence and increasing application complexity today is motivating the design of chip multiprocessor (CMP) applications with multiple use cases. Mo...
HCW
2000
IEEE
15 years 2 months ago
2000
IEEE
Applications that use collections of very large, distributed datasets have become an increasingly important part of science and engineering. With high performance wide-area networ...
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CODES
2004
IEEE
15 years 1 months ago
2004
IEEE
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
IPPS
2006
IEEE
15 years 3 months ago
2006
IEEE
The increasing demand for FPGAs and reconfigurable hardware targeting high performance low power applications has lead to an increasing requirement for new high performance reconf...