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» Level Shifter Design for Low Power Applications
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MAM
2006
78views more  MAM 2006»
14 years 10 months ago
Operating system power minimization through run-time processor resource adaptation
The increasingly constrained power budget of today's microprocessor has resulted in a situation where power savings of all components in a system have to be taken into consid...
Tao Li, Lizy Kurian John
VLSID
2002
IEEE
160views VLSI» more  VLSID 2002»
15 years 10 months ago
PREDICTMOS MOSFET Model and its Application to Submicron CMOS Inverter Delay Analysis
Predictive delay analysis is presented for a representative CMOS inverter with submicron device size using PREDICTMOS MOSFET model. As against SPICE, which adopts a time consuming...
A. B. Bhattacharyya, Shrutin Ulman
DATE
2003
IEEE
97views Hardware» more  DATE 2003»
15 years 3 months ago
Enhancing Speedup in Network Processing Applications by Exploiting Instruction Reuse with Flow Aggregation
Instruction reuse is a microarchitectural technique that improves the execution time of a program by removing redundant computations at run-time. Although this is the job of an op...
G. Surendra, Subhasis Banerjee, S. K. Nandy
ASAP
2008
IEEE
182views Hardware» more  ASAP 2008»
15 years 4 months ago
Low-cost implementations of NTRU for pervasive security
NTRU is a public-key cryptosystem based on the shortest vector problem in a lattice which is an alternative to RSA and ECC. This work presents a compact and low power NTRU design ...
Ali Can Atici, Lejla Batina, Junfeng Fan, Ingrid V...
DATE
2009
IEEE
109views Hardware» more  DATE 2009»
15 years 4 months ago
A design methodology for fully reconfigurable Delta-Sigma data converters
This paper presents a design methodology for fully reconfigurable low-voltage Delta-Sigma converters as for instance used in next-generation wireless applications. The design metho...
Yi Ke, Jan Craninckx, Georges G. E. Gielen