Sciweavers

915 search results - page 73 / 183
» Level Shifter Design for Low Power Applications
Sort
View
ISVLSI
2002
IEEE
116views VLSI» more  ISVLSI 2002»
15 years 2 months ago
Multi-Output Timed Shannon Circuits
Timed Shannon circuits have been proposed as a synthesis approach for a low power optimization technique at the logic level since overall circuit switching probabilities may be re...
Mitchell A. Thornton, Rolf Drechsler, D. Michael M...
71
Voted
IPPS
2003
IEEE
15 years 3 months ago
A Novel Design Technology for Next Generation Ubiquitous Computing Architecture
Modern applications for mobile computing require high performance architectures. On the other hand, there are restrictions such as storage or power consumption. The use of reconï¬...
Carsten Nitsch, Camillo Lara, Udo Kebschull
COMCOM
1998
132views more  COMCOM 1998»
14 years 9 months ago
A distributed object platform infrastructure for multimedia applications
Although distributed object computing has developed rapidly over the past decade, and is now becoming commercially important, there remain key application areas inadequately suppo...
Geoff Coulson, Michael Clarke
BMCBI
2008
130views more  BMCBI 2008»
14 years 10 months ago
An enhanced partial order curve comparison algorithm and its application to analyzing protein folding trajectories
Background: Understanding how proteins fold is essential to our quest in discovering how life works at the molecular level. Current computation power enables researchers to produc...
Hong Sun, Hakan Ferhatosmanoglu, Motonori Ota, Yus...
CODES
2009
IEEE
15 years 4 months ago
A standby-sparing technique with low energy-overhead for fault-tolerant hard real-time systems
Time redundancy (rollback-recovery) and hardware redundancy are commonly used in real-time systems to achieve fault tolerance. From an energy consumption point of view, time redun...
Alireza Ejlali, Bashir M. Al-Hashimi, Petru Eles