915 search results - page 74 / 183 » Level Shifter Design for Low Power Applications |
ASPDAC
2007
ACM
15 years 2 months ago
2007
ACM
In recent years, several alternative devices have been proposed to deal with inherent limitation of conventional CMOS devices in terms of scalability at nanometer scale geometry. ...
ISSS
2002
IEEE
15 years 2 months ago
2002
IEEE
Adding a small loop cache to a microprocessor has been shown to reduce average instruction fetch energy for various sets of embedded system applications. With the advent of core-b...
CASES
2003
ACM
15 years 3 months ago
2003
ACM
Reducing the power consumption of computing devices has gained a lot of attention recently. Many research works have focused on reducing power consumption in the off-chip buses as...
EUROPAR
2005
Springer
15 years 3 months ago
2005
Springer
Abstract. Blue Gene/L uses a large number of low power processors, together with multiple integrated interconnection networks, to build a supercomputer with low cost, space and pow...
ASPDAC
2004
ACM
15 years 3 months ago
2004
ACM
- In this paper, we explore a new concept, called on-chip diversity, and introduce a design methodology for such emerging systems. Simply speaking, on-chip diversity means mixing d...