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ERSA
2008
145views Hardware» more  ERSA 2008»
14 years 11 months ago
Multicore Devices: A New Generation of Reconfigurable Architectures
For two decades, reconfigurable computing systems have provided an attractive alternative to fixed hardware solutions. Reconfigurable computing systems have demonstrated the low c...
Steven A. Guccione
GLVLSI
2007
IEEE
162views VLSI» more  GLVLSI 2007»
15 years 4 months ago
Design of an UHF RFID transponder for secure authentication
RFID technology increases rapidly its applicability in new areas of interest without guaranteeing security and privacy issues. This paper presents a new architecture of an RFID tr...
Paolo Bernardi, Filippo Gandino, Bartolomeo Montru...
DELTA
2010
IEEE
15 years 3 months ago
Design of an Infrastructural IP Dependability Manager for a Dependable Reconfigurable Many-Core Processor
Reconfigurable many-core processors have many advantages over conventionally designed devices, such as low power consumption and very high flexibility. For an increasing number of...
Hans G. Kerkhoff, Xiao Zhang
SIGARCH
2008
96views more  SIGARCH 2008»
14 years 10 months ago
Towards hybrid last level caches for chip-multiprocessors
As CMP platforms are widely adopted, more and more cores are integrated on to the die. To reduce the off-chip memory access, the last level cache is usually organized as a distribu...
Li Zhao, Ravi Iyer, Mike Upton, Don Newell
ISCAS
2007
IEEE
79views Hardware» more  ISCAS 2007»
15 years 4 months ago
Impact of strain on the design of low-power high-speed circuits
- In this article, we explore the impact of strain on circuit performance when strained silicon (s-Si) devices are used for designing low-power high-speed circuits. Emphasis has be...
H. Ramakrishnan, K. Maharatna, S. Chattopadhyay, A...