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ASPDAC
1995
ACM
127views Hardware» more  ASPDAC 1995»
15 years 8 months ago
Reclocking for high-level synthesis
In this paper we describe, a powerful post-synthesis approach called reclocking, for performance improvement by minimizing the total execution time. By back annotating the wire del...
Pradip K. Jha, Nikil D. Dutt, Sri Parameswaran
HPCN
1997
Springer
15 years 8 months ago
Boolean Function Manipulation on a Parallel System Using BDDs
This paper describes a distributed algorithm for Boolean function manipulation. The algorithm is based on Binary Decision Diagrams (BDDs), which are one of the most commonly used ...
F. Bianchi, Fulvio Corno, Maurizio Rebaudengo, Mat...
DEXAW
1995
IEEE
101views Database» more  DEXAW 1995»
15 years 8 months ago
Principles and Tools for Authoring Knowledge-Rich Documents
Digital libraries can take advantage of documents that have their content (semantics) explicitly represented as knowledge structures. These knowledge-rich documents can be created ...
Robert P. Futrelle, Natalya Fridman Noy
EURODAC
1995
IEEE
127views VHDL» more  EURODAC 1995»
15 years 8 months ago
Layout synthesis for datapath designs
DPLAYOUT is a layout synthesis tool for bit-sliced datapath designs targeting standard-cell libraries. We developed fast and efficient heuristics for placing the cells in a bit-s...
Naveen Buddi, Malgorzata Chrzanowska-Jeske, Charle...
POPL
1997
ACM
15 years 8 months ago
Parameterized Types for Java
Java offers the real possibility that most programs can be written in a type-safe language. However, for Java to be broadly useful, it needs additional expressive power. This pape...
Andrew C. Myers, Joseph A. Bank, Barbara Liskov