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JNSM
2008
130views more  JNSM 2008»
15 years 1 days ago
Declarative Infrastructure Configuration Synthesis and Debugging
There is a large conceptual gap between end-to-end infrastructure requirements and detailed component configuration implementing those requirements. Today, this gap is manually br...
Sanjai Narain, Gary Levin, Sharad Malik, Vikram Ka...
JUCS
2006
112views more  JUCS 2006»
15 years 11 hour ago
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip
Abstract: Advances in technology now make it possible to integrate hundreds of cores (e.g. general or special purpose processors, embedded memories, application specific components...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
PPL
2008
185views more  PPL 2008»
15 years 4 hour ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...
BMCBI
2005
134views more  BMCBI 2005»
14 years 12 months ago
Windows .NET Network Distributed Basic Local Alignment Search Toolkit (W.ND-BLAST)
Background: BLAST is one of the most common and useful tools for Genetic Research. This paper describes a software application we have termed Windows .NET Distributed Basic Local ...
Scot E. Dowd, Joaquin Zaragoza, Javier R. Rodrigue...
BMCBI
2005
246views more  BMCBI 2005»
14 years 12 months ago
ParPEST: a pipeline for EST data analysis based on parallel computing
Background: Expressed Sequence Tags (ESTs) are short and error-prone DNA sequences generated from the 5' and 3' ends of randomly selected cDNA clones. They provide an im...
Nunzio D'Agostino, Mario Aversano, Maria Luisa Chi...