31 search results - page 5 / 7 » LimitLESS Directories: A Scalable Cache Coherence Scheme |
86
Voted
TC
2010
14 years 8 months ago
2010
—The number of CPUs in chip multiprocessors is growing at the Moore’s Law rate, due to continued technology advances. However, new technologies pose serious reliability challen...
ICPP
1994
IEEE
15 years 2 months ago
1994
IEEE
- This paper proposes a distributed directory cache coherence protocol and compares the performance of the proposed protocol with fully mapped and single linked list protocols for ...
79
Voted
ICPADS
1994
IEEE
15 years 2 months ago
1994
IEEE
: Software cache coherence schemes are very desirable in the design of scalable multiprocessors and massively parallel processors. The authors propose a software cache coherence sc...
107
Voted
DSN
2011
IEEE
13 years 10 months ago
2011
IEEE
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...
79
Voted
ICWL
2004
Springer
15 years 3 months ago
2004
Springer
Abstract. In many circumstances, including e-learning, there is a need to reorganize digital resources, scattered in many places, into a coherently accessible repository. This pape...