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» Limits of Work-Stealing Scheduling
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97
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VLSID
2005
IEEE
102views VLSI» more  VLSID 2005»
16 years 1 months ago
Integrated On-Chip Storage Evaluation in ASIP Synthesis
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar
102
Voted
PODS
2001
ACM
143views Database» more  PODS 2001»
16 years 23 days ago
Pipelining in Multi-Query Optimization
Database systems frequently have to execute a set of related queries, which share several common subexpressions. Multi-query optimization exploits this, by finding evaluation plan...
Nilesh N. Dalvi, Sumit K. Sanghai, Prasan Roy, S. ...
116
Voted
ISCA
2008
IEEE
137views Hardware» more  ISCA 2008»
15 years 7 months ago
Self-Optimizing Memory Controllers: A Reinforcement Learning Approach
Efficiently utilizing off-chip DRAM bandwidth is a critical issue in designing cost-effective, high-performance chip multiprocessors (CMPs). Conventional memory controllers deli...
Engin Ipek, Onur Mutlu, José F. Martí...
ECRTS
2007
IEEE
15 years 7 months ago
Probabilistic Admission Control to Govern Real-Time Systems under Overload
Existing real-time research focuses on how to formulate, model and enforce timeliness guarantees for task sets whose correctness has a temporal aspect. However, the resulting syst...
Claude-Joachim Hamann, Michael Roitzsch, Lars Reut...
128
Voted
RTAS
1998
IEEE
15 years 4 months ago
Managing Memory Requirements in the Synthesis of Real-Time Systems from Processing Graphs
In the past, environmental restrictions on size, weight, and power consumption have severely limited both the processing and storage capacity of embedded signal processing systems...
Steve Goddard, Kevin Jeffay