331 search results - page 1 / 67 » Limits on Multiple Instruction Issue |
40
Voted
ASPLOS
1989
ACM
15 years 1 months ago
1989
ACM
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
To satisfy high-performance computing demand in modern embedded devices, current embedded processor architectures provide designer with possibility either to define customized ins...
IJAIT
2008
14 years 9 months ago
2008
Instruction scheduling is one of the most important steps for improving the performance of object code produced by a compiler. A fundamental problem that arises in instruction sch...
DSD
2002
IEEE
15 years 2 months ago
2002
IEEE
Modern microprocessors schedule instructions dynamically in order to exploit instruction-level parallelism. It is necessary to increase instruction window size for improving instr...
MICRO
1994
IEEE
15 years 1 months ago
1994
IEEE
Multiple issue of instructions occurs in superscalar and VLIW machines. This paper investigates a third type of machine design, which combines the advantages of code compatibility...