331 search results - page 17 / 67 » Limits on Multiple Instruction Issue |
ISCA
1995
IEEE
15 years 1 months ago
1995
IEEE
Speculative execution is execution of instructions before it is known whether these instructions should be executed. Compiler-based speculative execution has the potential to achi...
CASES
2009
ACM
15 years 4 months ago
2009
ACM
Several multithreading techniques have been proposed to reduce resource underutilization in Very Long Instruction Word (VLIW) processors. Simultaneous MultiThreading (SMT) is a po...
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
—The contribution of memory latency to execution time continues to increase, and latency hiding mechanisms become ever more important for efficient processor design. While high-...
ASPLOS
2004
ACM
15 years 3 months ago
2004
ACM
Pipeline flushes are becoming increasingly expensive in modern microprocessors with large instruction windows and deep pipelines. Selective re-execution is a technique that can r...
LCPC
1998
Springer
15 years 2 months ago
1998
Springer
Although SIMD (Single Instruction stream Multiple Data stream) parallel computers have existed for decades, it is only in the past few years that a new version of SIMD has evolved...