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VLSID
2002
IEEE
98views VLSI» more  VLSID 2002»
15 years 10 months ago
On Test Scheduling for Core-Based SOCs
We present a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of te...
Sandeep Koranne
DATE
2005
IEEE
102views Hardware» more  DATE 2005»
15 years 3 months ago
New Schemes for Self-Testing RAM
This paper gives an overview of a new technique, named pseudo-ring testing (PRT). PRT can be applied for testing wide type of random access memories (RAM): bitor word-oriented and...
Ghenadie Bodean, D. Bodean, A. Labunetz
ENTCS
2010
104views more  ENTCS 2010»
14 years 10 months ago
Tableau Tool for Testing Satisfiability in LTL: Implementation and Experimental Analysis
We report on the implementation and experimental analysis of an incremental multi-pass tableau-based procedure `a la Wolper for testing satisfiability in the linear time temporal ...
Valentin Goranko, Angelo Kyrilov, Dmitry Shkatov
HEURISTICS
2008
120views more  HEURISTICS 2008»
14 years 10 months ago
A local linear embedding module for evolutionary computation optimization
A Local Linear Embedding (LLE) module enhances the performance of two Evolutionary Computation (EC) algorithms employed as search tools in global optimization problems. The LLE em...
Fabio Boschetti
GD
2006
Springer
15 years 1 months ago
Planarity Testing and Optimal Edge Insertion with Embedding Constraints
The planarization method has proven to be successful in graph drawing. The output, a combinatorial planar embedding of the so-called planarized graph, can be combined with state-o...
Carsten Gutwenger, Karsten Klein, Petra Mutzel