555 search results - page 16 / 111 » Linear decomposition algorithm for VLSI design applications |
SBCCI
2009
ACM
15 years 2 months ago
2009
ACM
The multiplication of a variable by multiple constants, i.e., the multiple constant multiplications (MCM), has been a central operation and performance bottleneck in many applicat...
SDM
2009
SIAM
15 years 7 months ago
2009
SIAM
This paper demonstrates the applicability of the recently proposed supervised dimension reduction, hierarchical linear discriminant analysis (h-LDA) to a well-known spatial locali...
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
In this paper, we present a methodology for customized communication architecture synthesis that matches the communication requirements of the target application. This is an impor...
VLSID
1993
IEEE
15 years 1 months ago
1993
IEEE
Low latency, application, specific multipliers are required for m,any DSP algorithms. Tree multipliers are an obvious answer to this requirement. However, tree architectures have ...
ICCD
2001
IEEE
15 years 6 months ago
2001
IEEE
Reduced Ordered Binary Decision Diagrams (BDDs) are a data structure for representation and manipulation of Boolean functions which are frequently used in VLSI Design Automation. ...