555 search results - page 23 / 111 » Linear decomposition algorithm for VLSI design applications |
GLVLSI
2007
IEEE
14 years 10 months ago
2007
IEEE
Given a set of placed blocks, we present an algorithm that minimally spaces the blocks to ensure routability under several assumptions. By performing a binary search on total widt...
111
click to vote
ICCAD
2010
IEEE
14 years 7 months ago
2010
IEEE
Clock mesh is popular in high performance VLSI design because it is more robust against variations than clock tree at a cost of higher power consumption. In this paper, we propose ...
JPDC
2006
14 years 9 months ago
2006
Minimum Spanning Tree (MST) is one of the most studied combinatorial problems with practical applications in VLSI layout, wireless communication, and distributed networks, recent ...
JPDC
2007
14 years 9 months ago
2007
This paper discusses algorithmic and implementation aspects of a distributed remote visualization system that optimally decomposes and adaptively maps the visualization pipeline t...
ISPD
2005
ACM
15 years 3 months ago
2005
ACM
Research in floorplanning and block-packing has generated a variety of data structures to represent spatial configurations of circuit modules. Much of this work focuses on the g...