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» Linear decomposition algorithm for VLSI design applications
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ISPD
2004
ACM
189views Hardware» more  ISPD 2004»
15 years 5 months ago
Almost optimum placement legalization by minimum cost flow and dynamic programming
VLSI placement tools usually work in two steps: First, the cells that have to be placed are roughly spread out over the chip area ignoring disjointness (global placement). Then, i...
Ulrich Brenner, Anna Pauli, Jens Vygen
GLVLSI
2006
IEEE
124views VLSI» more  GLVLSI 2006»
15 years 6 months ago
Dominator-based partitioning for delay optimization
Most of the logic synthesis algorithms are not scalable for large networks and, for this reason, partitioning is often applied. However traditional mincut-based partitioning techn...
David Bañeres, Jordi Cortadella, Michael Ki...
ICCD
2008
IEEE
124views Hardware» more  ICCD 2008»
15 years 8 months ago
Global bus route optimization with application to microarchitectural design exploration
— Circuit and processor designs will continue to increase in complexity for the foreseeable future. With these increasing sizes comes the use of wide buses to move large amounts ...
Dae Hyun Kim, Sung Kyu Lim
GLVLSI
2003
IEEE
129views VLSI» more  GLVLSI 2003»
15 years 5 months ago
A system-level methodology for fast multi-objective design space exploration
In this paper, we address the problem of the efficient exploration of the architectural design space for parameterized systems. Since the design space is multi-objective, our aim ...
Gianluca Palermo, Cristina Silvano, S. Valsecchi, ...
GLVLSI
2003
IEEE
202views VLSI» more  GLVLSI 2003»
15 years 5 months ago
System level design of real time face recognition architecture based on composite PCA
Design and implementation of a fast parallel architecture based on an improved principal component analysis (PCA) method called Composite PCA suitable for real-time face recogniti...
Rajkiran Gottumukkal, Vijayan K. Asari