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» Linear decomposition algorithm for VLSI design applications
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135
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DFT
2005
IEEE
83views VLSI» more  DFT 2005»
15 years 9 months ago
An ILP Formulation for Yield-driven Architectural Synthesis
Data flow graph dominant designs, such as communication video and audio applications, are common in today’s IC industry. In these designs, the datapath resources (e.g., adders,...
Zhaojun Wo, Israel Koren, Maciej J. Ciesielski
136
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ISCAS
2003
IEEE
131views Hardware» more  ISCAS 2003»
15 years 9 months ago
Process variation dimension reduction based on SVD
We propose an algorithm based on singular value decomposition (SVD) to reduce the number of process variation variables. With few process variation variables, fault simulation and...
Zhuo Li, Xiang Lu, Weiping Shi
141
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VLSID
2006
IEEE
158views VLSI» more  VLSID 2006»
15 years 9 months ago
Programmable LDPC Decoder Based on the Bubble-Sort Algorithm
Low density parity check (LDPC) codes are one of the most powerful error correcting codes known. Recent research have pointed out their potential for a low cost, low latency hardw...
Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
136
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GLVLSI
2003
IEEE
171views VLSI» more  GLVLSI 2003»
15 years 9 months ago
Combining wire swapping and spacing for low-power deep-submicron buses
We propose an approach for reducing the energy consumption of address buses that targets both the switching and the crosstalk components of power dissipation. The method is based ...
Enrico Macii, Massimo Poncino, Sabino Salerno
124
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FPL
2005
Springer
149views Hardware» more  FPL 2005»
15 years 9 months ago
Heterogeneity Exploration for Multiple 2D Filter Designs
Many image processing applications require fast convolution of an image with a set of large 2D filters. Field - Programmable Gate Arrays (FPGAs) are often used to achieve this go...
Christos-Savvas Bouganis, Peter Y. K. Cheung, Geor...