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» Linear decomposition algorithm for VLSI design applications
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FCCM
2006
IEEE
107views VLSI» more  FCCM 2006»
15 years 10 months ago
Hardware/Software Integration for FPGA-based All-Pairs Shortest-Paths
Field-Programmable Gate Arrays (FPGAs) are being employed in high performance computing systems owing to their potential to accelerate a wide variety of long-running routines. Par...
Uday Bondhugula, Ananth Devulapalli, James Dinan, ...
FCCM
2009
IEEE
164views VLSI» more  FCCM 2009»
15 years 10 months ago
A Parameterized Stereo Vision Core for FPGAs
—We present a parameterized stereo vision core suitable for a wide range of FPGA targets and stereo vision applications. By enabling easy tuning of algorithm parameters, our syst...
Stephen Longfield Jr., Mark L. Chang
DAC
2004
ACM
16 years 4 months ago
Efficient power/ground network analysis for power integrity-driven design methodology
As technology advances, the metal width is decreasing with the length increasing, making the resistance along the power line increase substantially. Together with the nonlinear sc...
Su-Wei Wu, Yao-Wen Chang
ERSA
2009
149views Hardware» more  ERSA 2009»
15 years 1 months ago
Hardware-Optimized Ziggurat Algorithm for High-Speed Gaussian Random Number Generators
Many scientific and engineering applications, which are increasingly being ported from software to reconfigurable platforms, require Gaussian-distributed random numbers. Thus, the...
Hassan Edrees, Brian Cheung, McCullen Sandora, Dav...
DAC
1989
ACM
15 years 8 months ago
A New Approach to the Rectilinear Steiner Tree Problem
: We discuss a new approach to constructing the rectilinear Steiner tree (RST) of a given set of points in the plane, starting from a minimum spanning tree (MST). The main idea in ...
Jan-Ming Ho, Gopalakrishnan Vijayan, C. K. Wong