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» Linear decomposition algorithm for VLSI design applications
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143
Voted
ICCAD
2002
IEEE
152views Hardware» more  ICCAD 2002»
16 years 25 days ago
Efficient instruction encoding for automatic instruction set design of configurable ASIPs
Application-specific instructions can significantly improve the performance, energy, and code size of configurable processors. A common approach used in the design of such instruc...
Jong-eun Lee, Kiyoung Choi, Nikil Dutt
135
Voted
IPPS
1998
IEEE
15 years 8 months ago
Design, Implementation and Evaluation of Parallel Pipelined STAP on Parallel Computers
This paper presents performance results for the design and implementation of parallel pipelined Space-Time Adaptive Processing (STAP) algorithms on parallel computers. In particul...
Alok N. Choudhary, Wei-keng Liao, Donald Weiner, P...
147
Voted
ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
16 years 26 days ago
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
Yu Hu, Satyaki Das, Steven Trimberger, Lei He
162
Voted
EMSOFT
2004
Springer
15 years 9 months ago
Scheduling within temporal partitions: response-time analysis and server design
As the bandwidth of CPUs and networks continues to grow, it becomes more attractive, for efficiency reasons, to share such resources among several applications with the minimum le...
Luís Almeida, Paulo Pedreiras
CF
2008
ACM
15 years 6 months ago
Cell-SWat: modeling and scheduling wavefront computations on the cell broadband engine
This paper contributes and evaluates a model and a methodology for implementing parallel wavefront algorithms on the Cell Broadband Engine. Wavefront algorithms are vital in sever...
Ashwin M. Aji, Wu-chun Feng, Filip Blagojevic, Dim...