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SDL
2001
89views Hardware» more  SDL 2001»
15 years 5 months ago
Some Implications of MSC, SDL and TTCN Time Extensions for Computer-Aided Test Generation
The purpose of this paper is to describe how computer-aided test generation methods can benefit from the time features and extensions to MSC, SDL and TTCN which are either already ...
Dieter Hogrefe, Beat Koch, Helmut Neukirchen
IANDC
2008
116views more  IANDC 2008»
15 years 3 months ago
Deciding expressive description logics in the framework of resolution
We present a decision procedure for the description logic SHIQ based on the basic superposition calculus, and show that it runs in exponential time for unary coding of numbers. To...
Ullrich Hustadt, Boris Motik, Ulrike Sattler
ICASSP
2011
IEEE
14 years 7 months ago
Down-scaling interlace video from H.264/AVC intra-coded bit stream
In this paper, we develop a method for generating thumbnail images from the interlaced H.264/AVC coded bit streams. We devise a method exploiting both the spatial and transform do...
Huy N. Tran, Hyung Suk Oh, Wonha Kim
ICFP
2009
ACM
16 years 4 months ago
Implementing first-class polymorphic delimited continuations by a type-directed selective CPS-transform
We describe the implementation of first-class polymorphic delimited continuations in the programming language Scala. We use Scala's pluggable typing architecture to implement...
Tiark Rompf, Ingo Maier, Martin Odersky
CAV
2009
Springer
212views Hardware» more  CAV 2009»
16 years 4 months ago
Beaver: Engineering an Efficient SMT Solver for Bit-Vector Arithmetic
We present the key ideas in the design and implementation of Beaver, an SMT solver for quantifier-free finite-precision bit-vector logic (QF BV). Beaver uses an eager approach, enc...
Susmit Jha, Rhishikesh Limaye, Sanjit A. Seshia