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MICRO
2005
IEEE
126views Hardware» more  MICRO 2005»
15 years 3 months ago
Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
IFM
2004
Springer
175views Formal Methods» more  IFM 2004»
15 years 3 months ago
State/Event-Based Software Model Checking
Abstract. We present a framework for model checking concurrent software systems which incorporates both states and events. Contrary to other state/event approaches, our work also i...
Sagar Chaki, Edmund M. Clarke, Joël Ouaknine,...
SAMOS
2004
Springer
15 years 3 months ago
Scalable Instruction-Level Parallelism.
This paper presents a model for instruction-level distributed computing that allows the implementation of scalable chip multiprocessors. Based on explicit microthreading it serves ...
Chris R. Jesshope
RTAS
2003
IEEE
15 years 2 months ago
Collaborative Operating System and Compiler Power Management for Real-Time Applications
Managing energy consumption has become vitally important to battery operated portable and embedded systems. A dynamic voltage scaling (DVS) technique reduces the processor’s dyn...
Nevine AbouGhazaleh, Daniel Mossé, Bruce R....
SBACPAD
2003
IEEE
138views Hardware» more  SBACPAD 2003»
15 years 2 months ago
Finite Difference Simulations of the Navier-Stokes Equations Using Parallel Distributed Computing
 This paper discusses the implementation of a numerical algorithm for simulating incompressible fluid flows based on the finite difference method and designed for parallel compu...
João Paulo De Angeli, Andréa M. P. V...