This paper investigates the design of parallel algorithmic strategies that address the efficient use of both, memory hierarchies within each processor and a multilevel clustered ...
Frank K. H. A. Dehne, Stefano Mardegan, Andrea Pie...
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
Pipeline Spectroscopy is a new technique that allows us to measure the cost of each cache miss. The cost of a miss is displayed (graphed) as a histogram, which represents a precis...
Thomas R. Puzak, Allan Hartstein, Philip G. Emma, ...
We propose an algorithm to find a counterexample to some property in a finite state program. This algorithm is derived from SPIN’s one, but it finds a counterexample faster th...
We present a novel algorithm for rendering physically-based soft shadows in complex scenes. Instead of casting shadow rays, we place both the points to be shaded and the samples o...