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» Linear-Time Algorithms in Memory Hierarchies
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ISSS
2000
IEEE
111views Hardware» more  ISSS 2000»
15 years 2 months ago
Systematic Data Reuse Exploration Methodology for Irregular Access Patterns
Efficient use of an optimized custom memory hierarchy to exploit temporal locality in the memory accesses on array signals can have a very large impact on the power consumption i...
Tanja Van Achteren, Rudy Lauwereins, Francky Catth...
ASPLOS
1991
ACM
15 years 1 months ago
The Cache Performance and Optimizations of Blocked Algorithms
Blocking is a well-known optimization technique for improving the effectiveness of memory hierarchies. Instead of operating on entire rows or columns of an array, blocked algorith...
Monica S. Lam, Edward E. Rothberg, Michael E. Wolf
95
Voted
PDPTA
1996
14 years 11 months ago
Stereo Vision and 3D Reconstruction on a Distributed Memory System
An important research topic in image processing is stereo vision. The objective is to compute a 3-dimensional representation of some scenery from two 2-dimensional digital images....
N. H. L. Kuijpers, G. Paar, Johan J. Lukkien
CASES
2010
ACM
14 years 7 months ago
Fine-grain dynamic instruction placement for L0 scratch-pad memory
We present a fine-grain dynamic instruction placement algorithm for small L0 scratch-pad memories (spms), whose unit of transfer can be an individual instruction. Our algorithm ca...
JongSoo Park, James D. Balfour, William J. Dally
DATE
2007
IEEE
89views Hardware» more  DATE 2007»
15 years 3 months ago
Mapping multi-dimensional signals into hierarchical memory organizations
The storage requirements of the array-dominated and looporganized algorithmic specifications running on embedded systems can be significant. Employing a data memory space much l...
Hongwei Zhu, Ilie I. Luican, Florin Balasa