100 search results - page 4 / 20 » Linear-Time Model Checking: Automata Theory in Practice |
119
Voted
CADE
2007
Springer
15 years 10 months ago
2007
Springer
Manna and Pnueli have extensively shown how a mixture of first-order logic (FOL) and discrete Linear time Temporal Logic (LTL) is sufficient to precisely state verification problem...
109
Voted
CONCUR
1999
Springer
15 years 2 months ago
1999
Springer
Abstract. The paper presents a partial order reduction method applicable to networks of timed automata. The advantage of the method is that it reduces both the number of explored c...
74
Voted
CADE
2006
Springer
15 years 2 months ago
2006
Springer
We present a tool for checking the sufficient completeness of linear, order-sorted equational specifications modulo associativity, commutativity, and identity. Our tool treats this...
79
Voted
CAV
2001
Springer
15 years 2 months ago
2001
Springer
In formal verification, we verify that a system is correct with respect to a specification. When verification succeeds and the system is proven to be correct, there is still a q...
99
Voted
CODES
2008
IEEE
15 years 1 days ago
2008
IEEE
SystemC is widely used for modeling and simulation in hardware/software co-design. Due to the lack of a complete formal semantics, it is not possible to verify SystemC designs. In...