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INFOCOM
2003
IEEE
15 years 6 months ago
Exploring the trade-off between label size and stack depth in MPLS Routing
— Multiprotocol Label Switching or MPLS technology is being increasingly deployed by several of the largest Internet service providers to solve problems such as traffic engineer...
Anupam Gupta, Amit Kumar, Rajeev Rastogi
IPPS
2003
IEEE
15 years 6 months ago
Parallel ROLAP Data Cube Construction On Shared-Nothing Multiprocessors
The pre-computation of data cubes is critical to improving the response time of On-Line Analytical Processing (OLAP) systems and can be instrumental in accelerating data mining tas...
Ying Chen, Frank K. H. A. Dehne, Todd Eavis, Andre...
93
Voted
ISCA
2003
IEEE
157views Hardware» more  ISCA 2003»
15 years 6 months ago
Pipeline Damping: A Microarchitectural Technique to Reduce Inductive Noise in Supply Voltage
Scaling of CMOS technology causes the power supply voltages to fall and supply currents to rise at the same time as operating speeds are increasing. Falling supply voltages cause ...
Michael D. Powell, T. N. Vijaykumar
109
Voted
ISMAR
2003
IEEE
15 years 6 months ago
A real-time tracker for markerless augmented reality
Augmented Reality has now progressed to the point where real-time applications are being considered and needed. At the same time it is important that synthetic elements are render...
Andrew I. Comport, Éric Marchand, Fran&cced...
IWSOC
2003
IEEE
104views Hardware» more  IWSOC 2003»
15 years 6 months ago
Incorporating Pattern Prediction Technique for Energy Efficient Filter Cache Design
: - A filter cache is proposed at a higher level than the L1 (main) cache in the memory hierarchy and is much smaller. The typical size of filter cache is of the order of 512 Bytes...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S...
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