55 search results - page 5 / 11 » Lithography Driven Layout Design |
133
Voted
ICCAD
2001
IEEE
16 years 17 days ago
2001
IEEE
In this paper, we present novel algorithms that effectively combine physical layout and early logic synthesis to improve overall design quality. In addition, we employ partitionin...
127
Voted
ICCD
1996
IEEE
15 years 7 months ago
1996
IEEE
In general, automatic layout composition techniques based on pre-designed devices facilitate the production of small IC numbers by prefabricating their basic structures. They also...
131
Voted
ICCAD
1991
IEEE
15 years 7 months ago
1991
IEEE
As feature sizes decrease and chip sizes increase, the area and performance of chips become dominated by the interconnect. In spite of this trend, most existing synthesis systems ...
119
Voted
ICCD
2004
IEEE
16 years 18 days ago
2004
IEEE
This paper proposes a new formalism for layout-driven optimization of datapaths. It is based on preserving an arithmetic bit level representation of the arithmetic circuit portion...
154
Voted
VLSID
2002
IEEE
15 years 8 months ago
2002
IEEE
We propose a timing-oriented logic optimization technique called Generalized De Morgan (GDM) transform, that integrates gate resizing, net buffering and De Morgan transformation. ...