We develop and evaluate a system for load management in shared-disk file systems built on clusters of heterogeneous computers. The system generalizes load balancing and server pr...
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...
A swap instruction, which exchanges a value in memory with a value of a register, is available on many architectures. The primary application of a swap instruction has been for pro...
Apan Qasem, David B. Whalley, Xin Yuan, Robert van...
Abstract. The load-store queue (LQ-SQ) of modern superscalar processors is responsible for keeping the order of memory operations. As the performance gap between processing speed a...
ion Abstracts Zizhan Zheng, Qianxiang Wang, Gang Huang and Hong Mei. Design and Implementation of the Load Balancing Mechanism in PKUAS (in Chinese). ACTA ELECTRONICA SINICA, 32(12...
Gang Huang, Tiancheng Liu, Hong Mei, Zizhan Zheng,...