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ANCS
2007
ACM
15 years 7 months ago
Towards high-performance flow-level packet processing on multi-core network processors
There is a growing interest in designing high-performance network devices to perform packet processing at flow level. Applications such as stateful access control, deep inspection...
Yaxuan Qi, Bo Xu, Fei He, Baohua Yang, Jianming Yu...
ANSS
2007
IEEE
15 years 9 months ago
Validation of a Load Shared Integrated Network with Heterogeneous Services
As wireless networks have become more complex with packet services and sophisticated modulation techniques, validation using multidimensional Markov Chain models has become increa...
S. J. Lincke
ASPLOS
1996
ACM
15 years 7 months ago
Shasta: A Low Overhead, Software-Only Approach for Supporting Fine-Grain Shared Memory
This paper describes Shasta, a system that supports a shared address space in software on clusters of computers with physically distributed memory. A unique aspect of Shasta compa...
Daniel J. Scales, Kourosh Gharachorloo, Chandramoh...
ISLPED
2003
ACM
87views Hardware» more  ISLPED 2003»
15 years 8 months ago
On load latency in low-power caches
Many of the recently proposed techniques to reduce power consumption in caches introduce an additional level of nondeterminism in cache access latency. Due to this additional late...
Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Ir...
IPPS
2010
IEEE
15 years 1 months ago
KRASH: Reproducible CPU load generation on many-core machines
Abstract--In this article we present KRASH, a tool for reproducible generation of system-level CPU load. This tool is intended for use in shared memory machines equipped with multi...
Swann Perarnau, Guillaume Huard