Sciweavers

1929 search results - page 179 / 386
» Load Balancing with Memory
Sort
View
ICPP
2008
IEEE
15 years 7 months ago
Scalable Techniques for Transparent Privatization in Software Transactional Memory
—We address the recently recognized privatization problem in software transactional memory (STM) runtimes, and introduce the notion of partially visible reads (PVRs) to heuristic...
Virendra J. Marathe, Michael F. Spear, Michael L. ...
CASES
2006
ACM
15 years 6 months ago
A dynamic code placement technique for scratchpad memory using postpass optimization
In this paper, we propose a fully automatic dynamic scratchpad memory (SPM) management technique for instructions. Our technique loads required code segments into the SPM on deman...
Bernhard Egger, Chihun Kim, Choonki Jang, Yoonsung...
NETWORK
2007
145views more  NETWORK 2007»
15 years 7 days ago
Analysis of Shared Memory Priority Queues with Two Discard Levels
— Two rate SLAs become increasingly popular in today’s Internet, allowing a customer to save money by paying one price for committed traffic and a much lower price for additio...
Shlomi Bergida, Yuval Shavitt
93
Voted
MICRO
2009
IEEE
121views Hardware» more  MICRO 2009»
15 years 7 months ago
Improving memory bank-level parallelism in the presence of prefetching
DRAM systems achieve high performance when all DRAM banks are busy servicing useful memory requests. The degree to which DRAM banks are busy is called DRAM Bank-Level Parallelism ...
Chang Joo Lee, Veynu Narasiman, Onur Mutlu, Yale N...
95
Voted
CORR
2007
Springer
83views Education» more  CORR 2007»
15 years 22 days ago
Simulation of Phase Combinations in Shape Memory Alloys Patches by Hybrid Optimization Methods
In this paper, phase combinations among martensitic variants in shape memory alloys patches and bars are simulated by a hybrid optimization methodology. The mathematical model is ...
Linxiang X. Wang, Roderick V. N. Melnik