162 search results - page 13 / 33 » Load Latency Tolerance in Dynamically Scheduled Processors |
107
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ICAC
2005
IEEE
15 years 3 months ago
2005
IEEE
This paper introduces a self-configuring architecture for scaling the database tier of dynamic content web servers. We use a unified approach to load and fault management based ...
ISCA
2002
IEEE
15 years 2 months ago
2002
IEEE
An increasingly large portion of scheduler latency is derived from the monolithic content addressable memory (CAM) arrays accessed during instruction wakeup. The performance of th...
111
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ICC
2009
IEEE
14 years 7 months ago
2009
IEEE
In a wireless ad hoc network, the main issue of a good broadcast protocol is to attain maximum reachability with minimal packet forwarding. Existing protocols address this issue by...
ICS
2000
Tsinghua U.
15 years 1 months ago
2000
Tsinghua U.
Memory system bottlenecks limit performance for many applications, and computations with strided access patterns are among the hardest hit. The streams used in such applications h...
80
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ICCCN
2007
IEEE
15 years 3 months ago
2007
IEEE
In the past decade cluster computing platforms have been widely applied to support a variety of scientific and commercial applications, many of which are parallel in nature. Howev...