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» Load Latency Tolerance in Dynamically Scheduled Processors
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ASPLOS
2010
ACM
15 years 4 months ago
Power routing: dynamic power provisioning in the data center
Data center power infrastructure incurs massive capital costs, which typically exceed energy costs over the life of the facility. To squeeze maximum value from the infrastructure,...
Steven Pelley, David Meisner, Pooya Zandevakili, T...
SIGOPSE
1998
ACM
15 years 1 months ago
MMLite: a highly componentized system architecture
MMLite is a modular system architecture that is suitable for a wide variety of hardware and applications. The system provides a selection of object-based components that are dynam...
Johannes Helander, Alessandro Forin
SOSP
1997
ACM
14 years 11 months ago
The Design, Implementation and Evaluation of SMART: A Scheduler for Multimedia Applications
Real-time applications such as multimedia audio and video are increasingly populating the workstation desktop. To support the execution of these applications in conjunction with t...
Jason Nieh, Monica S. Lam
IPPS
2005
IEEE
15 years 3 months ago
Configuration Steering for a Reconfigurable Superscalar Processor
An architecture for a reconfigurable superscalar processor is described in which some of its execution units are implemented in reconfigurable hardware. The overall configuration ...
Brian F. Veale, John K. Antonio, Monte P. Tull
COMAD
2008
14 years 11 months ago
Runtime Optimization of Continuous Queries
In data stream processing systems, Quality of Service (or QoS) requirements, as specified by users, are extremely important. Unlike in a database management system (DBMS), a query...
Balakumar Kendai, Sharma Chakravarthy