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PARA
2004
Springer
15 years 3 months ago
Cache Optimizations for Iterative Numerical Codes Aware of Hardware Prefetching
Cache optimizations typically include code transformations to increase the locality of memory accesses. An orthogonal approach is to enable for latency hiding by introducing prefet...
Josef Weidendorfer, Carsten Trinitis
SIGMETRICS
2003
ACM
199views Hardware» more  SIGMETRICS 2003»
15 years 2 months ago
Data cache locking for higher program predictability
Caches have become increasingly important with the widening gap between main memory and processor speeds. However, they are a source of unpredictability due to their characteristi...
Xavier Vera, Björn Lisper, Jingling Xue
HPDC
1996
IEEE
15 years 1 months ago
Modeling the Effects of Contention on the Performance of Heterogeneous Applications
Fast networks have made it possible to coordinate distributed heterogeneous CPU, memory, and storage resources to provide a powerful platform for executing high-performance applic...
Silvia M. Figueira, Francine Berman
WICOMM
2002
85views more  WICOMM 2002»
14 years 9 months ago
Throughput and energy performance of TCP on a wideband CDMA air interface
In this paper, we present a study on the performance of TCP, in terms of both throughput and energy consumption, in the presence of a Wideband CDMA radio interface typical of thir...
Michele Zorzi, Michele Rossi, Gianluca Mazzini
68
Voted
MICRO
2002
IEEE
131views Hardware» more  MICRO 2002»
15 years 2 months ago
Pointer cache assisted prefetching
Data prefetching effectively reduces the negative effects of long load latencies on the performance of modern processors. Hardware prefetchers employ hardware structures to predic...
Jamison D. Collins, Suleyman Sair, Brad Calder, De...