59 search results - page 9 / 12 » Load Miss Prediction - Exploiting Power Performance Trade-of... |
VLSID
2002
IEEE
15 years 10 months ago
2002
IEEE
Predictive delay analysis is presented for a representative CMOS inverter with submicron device size using PREDICTMOS MOSFET model. As against SPICE, which adopts a time consuming...
104
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RTSS
2003
IEEE
15 years 2 months ago
2003
IEEE
Data caches are essential in modern processors, bridging the widening gap between main memory and processor speeds. However, they yield very complex performance models, which make...
100
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EGPGV
2004
Springer
15 years 3 months ago
2004
Springer
This paper investigates assignment strategies (load balancing algorithms) for process farms which solve the problem of online placement of a constant number of independent tasks w...
CODES
2007
IEEE
15 years 4 months ago
2007
IEEE
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
121
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ECRTS
2006
IEEE
15 years 3 months ago
2006
IEEE
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...