109 search results - page 16 / 22 » Load aware traffic engineering for mesh networks |
CODES
2006
IEEE
15 years 1 months ago
2006
IEEE
During System on Chip (SoC) design, Network on Chip (NoC) prototyping is used for adapting NoC parameters to the application running on the chip. This prototyping is currently don...
103
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TPDS
2008
14 years 9 months ago
2008
We study efficient interference-aware joint routing and TDMA link scheduling for a multihop wireless network to maximize its throughput. Efficient link scheduling can greatly reduc...
83
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ICSE
2010
IEEE-ACM
15 years 2 months ago
2010
IEEE-ACM
Performance analysts rely heavily on load testing to measure the performance of their applications under a given load. During the load test, analyst strictly monitor and record th...
100
Voted
COMSWARE
2007
IEEE
15 years 4 months ago
2007
IEEE
: In this paper, we investigate the problem of routing lightpaths on an arbitrary physical topology following a Design Protection approach, such that virtual topology remains conne...
TPDS
1998
14 years 9 months ago
1998
—Three-dimensional packaging technologies are critical for enabling ultra-compact, massively parallel processors (MPPs) for embedded applications. Through-wafer optical interconn...