1133 search results - page 27 / 227 » Local Logics for Traces |
147
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ISSTA
2012
ACM
13 years 3 months ago
2012
ACM
A static analysis design is sufficient if it can prove the property of interest with an acceptable number of false alarms. Ultimately, the only way to confirm that an analysis d...
101
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ENTCS
2008
15 years 21 days ago
2008
This paper explores a unification of the ideas of Concurrent Separation Logic with those of Communicating Sequential Processes. It extends separation logic by an operator for sepa...
111
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FUZZY
1999
Springer
15 years 5 months ago
1999
Springer
The clinical interpretation of fetal heart rate traces is a difficult task that has led to the development computerised assessment systems. These systems are limited by their inabi...
81
Voted
VTS
2000
IEEE
15 years 5 months ago
2000
IEEE
ESIM is a simulation tool that integrates logic fault and design error simulation for logic circuits. It targets several design error and fault models, and uses a novel mix of sim...
104
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DATE
2004
IEEE
15 years 4 months ago
2004
IEEE
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...