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EUROSYS
2007
ACM
15 years 9 months ago
Thread clustering: sharing-aware scheduling on SMP-CMP-SMT multiprocessors
The major chip manufacturers have all introduced chip multiprocessing (CMP) and simultaneous multithreading (SMT) technology into their processing units. As a result, even low-end...
David K. Tam, Reza Azimi, Michael Stumm
TCAD
2008
88views more  TCAD 2008»
14 years 11 months ago
Self-Adaptive Data Caches for Soft-Error Reliability
Soft-error induced reliability problems have become a major challenge in designing new generation microprocessors. Due to the on-chip caches' dominant share in die area and tr...
Shuai Wang, Jie S. Hu, Sotirios G. Ziavras
DSD
2010
IEEE
112views Hardware» more  DSD 2010»
14 years 10 months ago
Re-NUCA: Boosting CMP Performance Through Block Replication
— Chip Multiprocessor (CMP) systems have become the reference architecture for designing micro-processors, thanks to the improvements in semiconductor nanotechnology that have co...
Pierfrancesco Foglia, Cosimo Antonio Prete, Marco ...
SIGARCH
2008
97views more  SIGARCH 2008»
14 years 11 months ago
SP-NUCA: a cost effective dynamic non-uniform cache architecture
1 This paper presents a simple but effective method to reduce on-chip access latency and improve core isolation in CMP Non-Uniform Cache Architectures (NUCA). The paper introduces ...
Javier Merino, Valentin Puente, Pablo Prieto, Jos&...
MDBIS
2003
132views Database» more  MDBIS 2003»
15 years 1 months ago
Cache-supported Processing of Queries in Mobile DBS
: The usage of mobile equipment like PDAs, mobile phones, Tablet PCs or laptops is already common in our current information society. Typically, mobile information systems work in ...
Hagen Höpfner, Kai-Uwe Sattler