202 search results - page 2 / 41 » Location cache: a low-power L2 cache system |
ICCD
2006
IEEE
15 years 6 months ago
2006
IEEE
— Traditional level-one instruction caches and data caches for embedded systems typically have the same capacities. Configurable caches either shut down a part of the cache to su...
GLVLSI
2010
IEEE
15 years 2 months ago
2010
IEEE
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
MICRO
1997
IEEE
15 years 1 months ago
1997
IEEE
Most modern microprocessors employ one or two levels of on-chip caches in order to improve performance. These caches are typically implemented with static RAM cells and often occu...
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DAC
1999
ACM
15 years 10 months ago
1999
ACM
In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory...
RTAS
2008
IEEE
15 years 3 months ago
2008
IEEE
Multi-core chips have been increasingly adopted by microprocessor industry. For real-time systems to safely harness the potential of multi-core computing, designers must be able t...