202 search results - page 4 / 41 » Location cache: a low-power L2 cache system |
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ASPLOS
2009
ACM
15 years 10 months ago
2009
ACM
Miss rate curves (MRCs) are useful in a number of contexts. In our research, online L2 cache MRCs enable us to dynamically identify optimal cache sizes when cache-partitioning a s...
ICCD
2004
IEEE
15 years 6 months ago
2004
IEEE
This paper proposes a power-aware cache block allocation algorithm for the way-selective setassociative cache on embedded systems to reduce energy consumption without additional d...
CASES
2006
ACM
15 years 3 months ago
2006
ACM
We propose an architecture that uses NAND flash memory to reduce main memory power in web server platforms. Our architecture uses a two level file buffer cache composed of a re...
LCTRTS
2007
Springer
15 years 3 months ago
2007
Springer
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
CASES
2007
ACM
15 years 1 months ago
2007
ACM
Energy, power, and area efficiency are critical design concerns for embedded processors. Much of the energy of a typical embedded processor is consumed in the front-end since inst...