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» Location cache: a low-power L2 cache system
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CODES
2005
IEEE
14 years 11 months ago
An efficient direct mapped instruction cache for application-specific embedded systems
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip memory, which is both time consuming and energy costly. Therefore, minimizing...
Chuanjun Zhang
ICCD
2006
IEEE
121views Hardware» more  ICCD 2006»
15 years 6 months ago
A Low Power Highly Associative Cache for Embedded Systems
—Reducing energy consumption is an important issue for battery powered embedded computing systems. Content Addressable Memory (CAM)-based Highly-Associative Caches (HAC) are wide...
Chuanjun Zhang
64
Voted
ICS
2009
Tsinghua U.
15 years 4 months ago
Dynamic cache clustering for chip multiprocessors
This paper proposes DCC (Dynamic Cache Clustering), a novel distributed cache management scheme for large-scale chip multiprocessors. Using DCC, a per-core cache cluster is compri...
Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem
DATE
2004
IEEE
151views Hardware» more  DATE 2004»
15 years 1 months ago
Dynamic Voltage and Cache Reconfiguration for Low Power
Given a set of real-time tasks scheduled using the earliest deadline first (EDF) algorithm, we discuss two techniques for reducing power consumption while meeting all timing requi...
André C. Nácul, Tony Givargis