202 search results - page 7 / 41 » Location cache: a low-power L2 cache system |
ICS
2005
Tsinghua U.
15 years 3 months ago
2005
Tsinghua U.
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
104
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ICCD
2007
IEEE
15 years 1 months ago
2007
IEEE
The emerging trend of larger number of cores or processors on a single chip in the server, desktop, and mobile notebook platforms necessarily demands larger amount of on-chip last...
91
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DAC
1999
ACM
15 years 10 months ago
1999
ACM
We present a novel approach that minimizes the power consumption of embedded core-based systems through hardware/software partitioning. Our approach is based on the idea of mapping...
DAC
2000
ACM
15 years 10 months ago
2000
ACM
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
75
Voted
RTSS
2008
IEEE
15 years 3 months ago
2008
IEEE
With the advent of increasingly complex hardware in realtime embedded systems (processors with performance enhancing features such as pipelines, cache hierarchy, multiple cores), ...