678 search results - page 115 / 136 » Lock-free parallel dynamic programming |
124
Voted
EUROPAR
2010
Springer
15 years 3 months ago
2010
Springer
Abstract. Shared last level cache is crucial to performance. However, multithread program model incurs serious contention in shared cache. In this paper, to reduce average cache ac...
113
Voted
ICS
2009
Tsinghua U.
15 years 9 months ago
2009
Tsinghua U.
Power and energy are first-order design constraints in high performance computing. Current research using dynamic voltage scaling (DVS) relies on trading increased execution time...
117
Voted
IPPS
2009
IEEE
15 years 9 months ago
2009
IEEE
We propose a novel design estimation method for adaptive streaming applications to be implemented on a partially reconfigurable FPGA. Based on experimental results we enable accu...
111
Voted
DCOSS
2009
Springer
15 years 9 months ago
2009
Springer
We consider dual classes of geometric coverage problems, in which disks, corresponding to coverage regions of sensors, are used to cover a region or set of points in the plane. The...
104
Voted
IPPS
2006
IEEE
15 years 8 months ago
2006
IEEE
In this paper an analysis of a dynamically reconfigurable processor is presented. The network processor incorporates a processor and a number of coprocessors that can be connected...