678 search results - page 116 / 136 » Lock-free parallel dynamic programming |
126
Voted
ICPP
2003
IEEE
15 years 8 months ago
2003
IEEE
Hardware prefetching is a simple and effective technique for hiding cache miss latency and thus improving the overall performance. However, it comes with addition of prefetch buff...
119
Voted
ICPP
2003
IEEE
15 years 8 months ago
2003
IEEE
Automatic optimization of address offset assignment for DSP applications, which reduces the number of address arithmetic instructions to meet the tight memory size restrictions an...
131
Voted
IEEEPACT
1999
IEEE
15 years 7 months ago
1999
IEEE
In current superscalar processors, all floating-point resources are idle during the execution of integer programs. As previous works show, this problem can be alleviated if the fl...
105
Voted
ICDCS
1996
IEEE
15 years 7 months ago
1996
IEEE
: Software capabilities are a very convenient means to protect co-operating applications. They allow access rights to be dynamically exchanged between mutually suspicious interacti...
113
Voted
ASPDAC
2007
ACM
15 years 6 months ago
2007
ACM
Parallel prefix adder is the most flexible and widely-used binary adder for ASIC designs. Many high-level synthesis techniques have been developed to find optimal prefix structures...