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DAC
2009
ACM
15 years 6 months ago
Clock skew optimization via wiresizing for timing sign-off covering all process corners
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm
SAC
2009
ACM
15 years 6 months ago
Points-to analysis for JavaScript
JavaScript is widely used by web developers and the complexity of JavaScript programs has increased over the last year. Therefore, the need for program analysis for JavaScript is ...
Dongseok Jang, Kwang-Moo Choe
WWW
2009
ACM
15 years 6 months ago
StatSnowball: a statistical approach to extracting entity relationships
Traditional relation extraction methods require pre-specified relations and relation-specific human-tagged examples. Bootstrapping systems significantly reduce the number of tr...
Jun Zhu, Zaiqing Nie, Xiaojiang Liu, Bo Zhang, Ji-...
ISORC
2009
IEEE
15 years 5 months ago
Component Based Middleware-Synthesis for AUTOSAR Basic Software
Distributed real-time automotive embedded systems have to be highly dependable as well as cost-efficient due to the large number of manufactured units. To close the gap between r...
Dietmar Schreiner, Markus Schordan, Karl M. Gö...
FDTC
2009
Springer
126views Cryptology» more  FDTC 2009»
15 years 5 months ago
WDDL is Protected against Setup Time Violation Attacks
—In order to protect crypto-systems against side channel attacks various countermeasures have been implemented such as dual-rail logic or masking. Faults attacks are a powerful t...
Nidhal Selmane, Shivam Bhasin, Sylvain Guilley, Ta...
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