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» Logic, Optimization, and Constraint Programming
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ASPDAC
2010
ACM
112views Hardware» more  ASPDAC 2010»
15 years 2 months ago
Optimizing blocks in an SoC using symbolic code-statement reachability analysis
Abstract-- Optimizing blocks in a System-on-Chip (SoC) circuit is becoming more and more important nowadays due to the use of third-party Intellectual Properties (IPs) and reused d...
Hong-Zu Chou, Kai-Hui Chang, Sy-Yen Kuo
DAC
2002
ACM
16 years 5 months ago
Software synthesis from synchronous specifications using logic simulation techniques
This paper addresses the problem of automatic generation of implementation software from high-level functional specifications in the context of embedded system on chip designs. So...
Yunjian Jiang, Robert K. Brayton
ICML
2005
IEEE
16 years 5 months ago
Learning the structure of Markov logic networks
Markov logic networks (MLNs) combine logic and probability by attaching weights to first-order clauses, and viewing these as templates for features of Markov networks. In this pap...
Stanley Kok, Pedro Domingos
ATS
2005
IEEE
164views Hardware» more  ATS 2005»
15 years 6 months ago
A Family of Logical Fault Models for Reversible Circuits
Reversibility is of interest in achieving extremely low power dissipation; it is also an inherent design requirement of quantum computation. Logical fault models for conventional ...
Ilia Polian, Thomas Fiehn, Bernd Becker, John P. H...
DAC
2005
ACM
16 years 5 months ago
A quasi-convex optimization approach to parameterized model order reduction
In this paper an optimization based model order reduction (MOR) framework is proposed. The method involves setting up a quasiconvex program that explicitly minimizes a relaxation ...
Kin Cheong Sou, Alexandre Megretski, Luca Daniel