Sciweavers

2291 search results - page 236 / 459
» Logic Programming and Model Checking
Sort
View
JUCS
2008
181views more  JUCS 2008»
15 years 6 months ago
An IP Core and GUI for Implementing Multilayer Perceptron with a Fuzzy Activation Function on Configurable Logic Devices
: This paper describes the development of an Intellectual Property (IP) core in VHDL able to implement a Multilayer Perceptron (MLP) artificial neural network (ANN) topology with u...
Alfredo Rosado Muñoz, Luis Gómez-Cho...
137
Voted
EPIA
2007
Springer
16 years 9 days ago
Prospective Logic Agents
As we face the real possibility of modelling agent systems capable of non-deterministic self-evolution, we are confronted with the problem of having several different possible futu...
Luís Moniz Pereira, Gonçalo Lopes
149
Voted
ATS
2005
IEEE
164views Hardware» more  ATS 2005»
15 years 8 months ago
A Family of Logical Fault Models for Reversible Circuits
Reversibility is of interest in achieving extremely low power dissipation; it is also an inherent design requirement of quantum computation. Logical fault models for conventional ...
Ilia Polian, Thomas Fiehn, Bernd Becker, John P. H...
164
Voted
APSEC
2008
IEEE
16 years 19 days ago
A Heap Model for Java Bytecode to Support Separation Logic
Memory usage analysis is an important problem for resource-constrained mobile devices, especially under mission- or safety-critical circumstances. Program codes running on or bein...
Chenguang Luo, Guanhua He, Shengchao Qin
ENTCS
2002
91views more  ENTCS 2002»
15 years 6 months ago
Subtyping in Logical Form
By using intersection types and filter models we formulate a theory of types for a -calculus with record subtyping via a finitary programming logic. Types are interpreted as space...
Ugo de'Liguoro