Sciweavers

1321 search results - page 229 / 265
» Logic Simulation Using Networks of State Machines
Sort
View
SIGCOMM
1996
ACM
15 years 1 months ago
Receiver-Driven Layered Multicast
State of the art, real-time, rate-adaptive, multimedia applications adjust their transmission rate to match the available network capacity. Unfortunately, this source-based rate-a...
Steven McCanne, Van Jacobson, Martin Vetterli
DATE
2009
IEEE
163views Hardware» more  DATE 2009»
15 years 4 months ago
Fixed points for multi-cycle path detection
—Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay ...
Vijay D'Silva, Daniel Kroening
WADT
2004
Springer
15 years 3 months ago
Type Class Polymorphism in an Institutional Framework
Higher-order logic with shallow type class polymorphism is widely used as a specification formalism. Its polymorphic entities (types, operators, axioms) can easily be equipped wit...
Lutz Schröder, Till Mossakowski, Christoph L&...
103
Voted
BMCBI
2008
214views more  BMCBI 2008»
14 years 9 months ago
Accelerating String Set Matching in FPGA Hardware for Bioinformatics Research
Background: This paper describes techniques for accelerating the performance of the string set matching problem with particular emphasis on applications in computational proteomic...
Yoginder S. Dandass, Shane C. Burgess, Mark Lawren...
MEMOCODE
2010
IEEE
14 years 7 months ago
Proving transaction and system-level properties of untimed SystemC TLM designs
Electronic System Level (ESL) design manages the complexity of todays systems by using abstract models. In this context Transaction Level Modeling (TLM) is state-of-theart for desc...
Daniel Große, Hoang M. Le, Rolf Drechsler