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» Logic Simulation Using Networks of State Machines
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ASPDAC
2008
ACM
151views Hardware» more  ASPDAC 2008»
15 years 4 months ago
High performance current-mode differential logic
This paper presents a new logic style, named Current-Mode Differential logic (CMDL), that achieves both high operating speed and low power consumption. Inspired by the low-voltage ...
Ling Zhang, Jianhua Liu, Haikun Zhu, Chung-Kuan Ch...
ALT
2010
Springer
15 years 4 months ago
Towards General Algorithms for Grammatical Inference
Many algorithms for grammatical inference can be viewed as instances of a more general algorithm which maintains a set of primitive elements, which distributionally define sets of ...
Alexander Clark
ANTSW
2008
Springer
15 years 4 months ago
Modeling Phase Transition in Self-organized Mobile Robot Flocks
We implement a self-organized flocking behavior in a group of mobile robots and analyze its transition from an aligned state to an unaligned state. We briefly describe the robot an...
Ali Emre Turgut, Cristián Huepe, Hande &Cce...
DFT
2003
IEEE
246views VLSI» more  DFT 2003»
15 years 8 months ago
Low Cost Convolutional Code Based Concurrent Error Detection in FSMs
We discuss the use of convolutional codes to perform concurrent error detection (CED) in finite state machines (FSMs). We examine a previously proposed methodology, we identify i...
Konstantinos Rokas, Yiorgos Makris, Dimitris Gizop...
DFT
2007
IEEE
104views VLSI» more  DFT 2007»
15 years 9 months ago
Reduction of Fault Latency in Sequential Circuits by using Decomposition
The paper discusses a novel approach for reduction of fault detection latency in a selfchecking sequential circuit. The Authors propose decomposing the finite state machine (FSM) ...
Ilya Levin, Benjamin Abramov, Vladimir Ostrovsky