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» Logic Synthesis for Engineering Change
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MSE
2005
IEEE
133views Hardware» more  MSE 2005»
15 years 3 months ago
Embedded System Design with FPGAs Using HDLs (Lessons Learned and Pitfalls to Be Avoided)
This paper describes the authors experience with teaching VHDL (and more recently, Verilog) to undergraduate and graduate students at WPI and to engineers through various short co...
R. James Duckworth
EON
2008
14 years 11 months ago
Abductive Synthesis of the Mediator Scenario with jABC and GEM
We reuse here the framework, the setting, and the semantic modelling for the automated synthesis of the SWS Challenge Mediator presented in the companion paper [5], and show how to...
Christian Kubczak, Tiziana Margaria, Matthias Kais...
CASES
2005
ACM
14 years 11 months ago
Exploring the design space of LUT-based transparent accelerators
Instruction set customization accelerates the performance of applications by compressing the length of critical dependence paths and reducing the demands on processor resources. W...
Sami Yehia, Nathan Clark, Scott A. Mahlke, Kriszti...
MSE
2005
IEEE
150views Hardware» more  MSE 2005»
15 years 3 months ago
A Cohesive FPGA-Based System-on-Chip Design Curriculum
A graduate-level computer engineering course sequence at the OGI School of Science and Engineering teaches state-of-the-art digital system design practices and system-on-chip desi...
John D. Lynch, Daniel Hammerstrom, Roy Kravitz
DAC
2007
ACM
15 years 10 months ago
Progressive Decomposition: A Heuristic to Structure Arithmetic Circuits
Despite the impressive progress of logic synthesis in the past decade, finding the best architecture for a given circuit still remains an open problem and largely unsolved. In mos...
Ajay K. Verma, Philip Brisk, Paolo Ienne