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» Logic and refinement for charts
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TCS
2008
14 years 9 months ago
Temporal constraints in the logical analysis of regulatory networks
Starting from the logical description of gene regulatory networks developed by R. Thomas, we introduce an enhanced modelling approach based on timed automata. We obtain a refined ...
Heike Siebert, Alexander Bockmayr
GLVLSI
2007
IEEE
141views VLSI» more  GLVLSI 2007»
15 years 1 months ago
A synchronization algorithm for local temporal refinements in perfectly synchronous models with nested feedback loops
he abstract and simple computation and communication mechanism in the synchronous computational model it is easy to simulate synchronous systems and to apply formal verification m...
Tarvo Raudvere, Ingo Sander, Axel Jantsch
CODES
2007
IEEE
15 years 1 months ago
Synchronization after design refinements with sensitive delay elements
The synchronous computational model with its simple computation and communication mechanism makes it easy to describe, simulate and formally verify synchronous embedded systems at...
Tarvo Raudvere, Ingo Sander, Axel Jantsch
WWW
2008
ACM
15 years 10 months ago
Automatically refining the wikipedia infobox ontology
The combined efforts of human volunteers have recently extracted numerous facts from Wikipedia, storing them as machine-harvestable object-attribute-value triples in Wikipedia inf...
Fei Wu, Daniel S. Weld
DFT
2007
IEEE
105views VLSI» more  DFT 2007»
15 years 3 months ago
A Refined Electrical Model for Particle Strikes and its Impact on SEU Prediction
Decreasing feature sizes have led to an increased vulnerability of random logic to soft errors. A particle strike may cause a glitch or single event transient (SET) at the output ...
Sybille Hellebrand, Christian G. Zoellin, Hans-Joa...