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» Logic design for low-voltage low-power CMOS circuits
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ISQED
2002
IEEE
106views Hardware» more  ISQED 2002»
13 years 11 months ago
Trading off Reliability and Power-Consumption in Ultra-low Power Systems
Critical systems like pace-makers, defibrillators, wearable computers and other electronic gadgets have to be designed not only for reliability but also for ultra-low power consu...
Atul Maheshwari, Wayne Burleson, Russell Tessier
DAC
2004
ACM
13 years 10 months ago
Implicit pseudo boolean enumeration algorithms for input vector control
In a CMOS combinational logic circuit, the subthreshold leakage current in the standby state depends on the state of the inputs. In this paper we present a new approach to identif...
Kaviraj Chopra, Sarma B. K. Vrudhula
DAC
2005
ACM
14 years 7 months ago
Simulation models for side-channel information leaks
Small, embedded integrated circuits (ICs) such as smart cards are vulnerable to so-called side-channel attacks (SCAs). The attacker can gain information by monitoring the power co...
Kris Tiri, Ingrid Verbauwhede
GI
2009
Springer
13 years 11 months ago
Challenges of Electronic CAD in the Nano Scale Era
: Future nano scale devices will expose different characteristics than todays silicon devices. While the exponential growth of non recurring expenses (NRE, mostly due to mask sets)...
Christian Hochberger, Andreas Koch
ICCAD
2003
IEEE
175views Hardware» more  ICCAD 2003»
14 years 3 months ago
Path Delay Estimation using Power Supply Transient Signals: A Comparative Study using Fourier and Wavelet Analysis
Transient Signal Analysis (TSA) is a parametric device testing technique based on the analysis of dynamic (transient) current (iDDT) drawn by the core logic from the power supply ...
Abhishek Singh, Jitin Tharian, Jim Plusquellic